An investigation into adaptive power reduction techniques for neural hardware
An investigation into adaptive power reduction techniques for neural hardware
In light of the growing applicability of Artificial Neural Network (ANN) in the signal processing field [1] and the present thrust of the semiconductor industry towards low-power SOCs for mobile devices [2], the power consumption of ANN hardware has become a very important implementation issue.
Adaptability is a powerful and useful feature of neural networks. All current approaches for low-power ANN hardware techniques are ‘non-adaptive’ with respect to the power consumption of the network (i.e. power-reduction is not an objective of the adaptation/learning process). In the research work presented in this thesis, investigations on possible adaptive power reduction techniques have been carried out, which attempt to exploit the adaptability of neural networks in order to reduce the power consumption. Three separate approaches for such adaptive power reduction are proposed: adaptation of size, adaptation of network weights and adaptation of calculation precision. Initial case studies exhibit promising results with significant power reductions
Modi, Sankalp
28a7f336-f2b6-4a5e-8d9a-7c0ed64194b9
December 2011
Modi, Sankalp
28a7f336-f2b6-4a5e-8d9a-7c0ed64194b9
Wilson, Peter
8a65c092-c197-4f43-b8fc-e12977783cb3
Brown, Andrew D.
5c19e523-65ec-499b-9e7c-91522017d7e0
Modi, Sankalp
(2011)
An investigation into adaptive power reduction techniques for neural hardware.
University of Southampton, Faculty of Physical and Applied Sciences, Masters Thesis, 120pp.
Record type:
Thesis
(Masters)
Abstract
In light of the growing applicability of Artificial Neural Network (ANN) in the signal processing field [1] and the present thrust of the semiconductor industry towards low-power SOCs for mobile devices [2], the power consumption of ANN hardware has become a very important implementation issue.
Adaptability is a powerful and useful feature of neural networks. All current approaches for low-power ANN hardware techniques are ‘non-adaptive’ with respect to the power consumption of the network (i.e. power-reduction is not an objective of the adaptation/learning process). In the research work presented in this thesis, investigations on possible adaptive power reduction techniques have been carried out, which attempt to exploit the adaptability of neural networks in order to reduce the power consumption. Three separate approaches for such adaptive power reduction are proposed: adaptation of size, adaptation of network weights and adaptation of calculation precision. Initial case studies exhibit promising results with significant power reductions
Text
MPhil_dissertation_SModi.pdf
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Published date: December 2011
Organisations:
University of Southampton, EEE
Identifiers
Local EPrints ID: 209079
URI: http://eprints.soton.ac.uk/id/eprint/209079
PURE UUID: ad5f0429-81d9-4ca6-888b-87e2a886a1df
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Date deposited: 02 Feb 2012 14:55
Last modified: 14 Mar 2024 04:44
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Contributors
Author:
Sankalp Modi
Thesis advisor:
Peter Wilson
Thesis advisor:
Andrew D. Brown
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