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Efficient design of switched current lowpass elliptic filters using Bruton transformations

Efficient design of switched current lowpass elliptic filters using Bruton transformations
Efficient design of switched current lowpass elliptic filters using Bruton transformations
This paper describes how the Bruton transformation facilitates the development of an efficient design methodology for switched current elliptic lowpass wave filters. Wave models for the design methodology including FDNR, capacitive source and load are presented. The proposed design method offers a significant reduction in the filter transistor count. For example, a 7th-order lowpass elliptic filter utilises 20% less delay elements and 16% less current mirrors when compared with a recently reported design method. This is achieved by having a filter with a large number of resistors and simplified series adapters. Simulated results based on a typical CMOS process for a lowpass elliptic filter with Fc=100KHz and Fs=1MHz are included.
115-18
Lancaster, J.
5dd777a5-d3e8-41ca-872c-577a466ed367
Al-Hashimi, B.M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Moniri, M.
90c91a89-08f2-4f99-8651-cc6e13a262e8
Lancaster, J.
5dd777a5-d3e8-41ca-872c-577a466ed367
Al-Hashimi, B.M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Moniri, M.
90c91a89-08f2-4f99-8651-cc6e13a262e8

Lancaster, J., Al-Hashimi, B.M. and Moniri, M. (1998) Efficient design of switched current lowpass elliptic filters using Bruton transformations. pp. 115-18 .

Record type: Conference or Workshop Item (Other)

Abstract

This paper describes how the Bruton transformation facilitates the development of an efficient design methodology for switched current elliptic lowpass wave filters. Wave models for the design methodology including FDNR, capacitive source and load are presented. The proposed design method offers a significant reduction in the filter transistor count. For example, a 7th-order lowpass elliptic filter utilises 20% less delay elements and 16% less current mirrors when compared with a recently reported design method. This is achieved by having a filter with a large number of resistors and simplified series adapters. Simulated results based on a typical CMOS process for a lowpass elliptic filter with Fc=100KHz and Fs=1MHz are included.

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More information

Published date: June 1998
Additional Information: Address: USA
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 251509
URI: http://eprints.soton.ac.uk/id/eprint/251509
PURE UUID: 3edc9cb1-cc82-4eb9-a5d8-614850d251bf

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Date deposited: 03 Nov 1999
Last modified: 10 Dec 2021 20:22

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Contributors

Author: J. Lancaster
Author: B.M. Al-Hashimi
Author: M. Moniri

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