Practical 2-dimensional bipolar-transistor-analysis algorithm
Practical 2-dimensional bipolar-transistor-analysis algorithm
Extensions to a 2-dimensional bipolar-transistor-modelling algorithm are described. They enable practical high-frequency silicon devices to be analysed in a time appreciably shorter than previously reported schemes. This allows device properties to be economically explored over a wide range of bias currents and voltages.
599 – 600
Zaluska, E.J.
43f6a989-9542-497e-bc9d-fe20f03cad35
Dubock, P.A.
7d05f246-288f-4d01-a446-0908c4b193f0
Kemhadjian, Henri
290aa39e-1ff6-4757-ac86-b4353104116e
1973
Zaluska, E.J.
43f6a989-9542-497e-bc9d-fe20f03cad35
Dubock, P.A.
7d05f246-288f-4d01-a446-0908c4b193f0
Kemhadjian, Henri
290aa39e-1ff6-4757-ac86-b4353104116e
Zaluska, E.J., Dubock, P.A. and Kemhadjian, Henri
(1973)
Practical 2-dimensional bipolar-transistor-analysis algorithm.
Electronics Letters, 9 (25), .
(doi:10.1049/el:19730443).
Abstract
Extensions to a 2-dimensional bipolar-transistor-modelling algorithm are described. They enable practical high-frequency silicon devices to be analysed in a time appreciably shorter than previously reported schemes. This allows device properties to be economically explored over a wide range of bias currents and voltages.
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Published date: 1973
Organisations:
Electronics & Computer Science
Identifiers
Local EPrints ID: 251647
URI: http://eprints.soton.ac.uk/id/eprint/251647
ISSN: 0013-5194
PURE UUID: fb7835ce-e0c2-4a3f-a66a-52008e193ebd
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Date deposited: 08 Nov 1999
Last modified: 16 Mar 2024 22:48
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Author:
E.J. Zaluska
Author:
P.A. Dubock
Author:
Henri Kemhadjian
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