The Architecture of RIG: A RISC for Image Generation in a Mulit-Microprocessor Environment
Anido, M L, Allerton, D J and Zaluska, E J (1988) The Architecture of RIG: A RISC for Image Generation in a Mulit-Microprocessor Environment. Microprocessing and Microprogramming, 24, 581-8.
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| Item Type: | Article |
|---|---|
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > Web & Internet Science |
| Item ID: | 251652 |
| Date Deposited: | 27 Jul 2000 |
| Last Modified: | 02 Mar 2012 11:37 |
| Contributors: | Anido, M L (Author) Allerton, D J (Author) Zaluska, E J (Author) |
| Date: | 1988 |
| Status: | Published |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/251652 |
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