An 12L clocked gate array for undergraduate design exercises


Jesshope, C R and Ashburn, P (1985) An 12L clocked gate array for undergraduate design exercises. Proceedings Part 1, 132, 54.

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Item Type: Other
Divisions : Faculty of Physical Sciences and Engineering > Electronics and Computer Science > NANO
ePrint ID: 251869
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1985Published
Date Deposited: 15 Nov 1999
Last Modified: 31 Mar 2016 13:52
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/251869

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