A robust analogue interface system for submicron video DSP
Redman-White, W., Duffee, R., Bramwell, S., Rijns, H., James, S., Tijou, J. and van der Weide, G. (1998) A robust analogue interface system for submicron video DSP. IEEE Journal of Solid State Circuits, 33, (7), 1076-1081.
Full text not available from this repository.
This paper describes the front-end architecture for a fully integrated low-voltage CMOS video DSP function, including AGC, equalization, clamping, sync, and A/D conversion. With multiple clock domains and many high-activity pads, the large digital section of the IC generates high levels of substrate and power line noise, which cannot be avoided with guiet period sampling. The analog section is therefore designed to minimize the injected noise by other circuit techniques. The system maximizes the available dynamic range in the 3.3-V supply, with several high-bandwidth rail-to-rail functions. A novel arrangement with high noise immunity level estimators is used to clamp the video in the middle of the dynamic range of the input amplifier, hence reducing amplification of unwanted dc components. Extensive mixed signal test facilities are also included in the design. The chip is fabricated in 0.5-um CMOS, and operates from a single 3.3-V supply.
|Divisions:||Faculty of Physical and Applied Science > Electronics and Computer Science > NANO
|Date Deposited:||09 Sep 2004|
|Last Modified:||02 Mar 2012 11:57|
|Contributors:||Redman-White, W. (Author)
Duffee, R. (Author)
Bramwell, S. (Author)
Rijns, H. (Author)
James, S. (Author)
Tijou, J. (Author)
van der Weide, G. (Author)
|Further Information:||Google Scholar|
|RDF:||RDF+N-Triples, RDF+N3, RDF+XML, Browse.|
Actions (login required)