A high bandwidth constant gm and slew-rate rail-to-rail CMOS input stage and its application to analogue cells for low voltage VLSI systems


Redman-White, W. (1997) A high bandwidth constant gm and slew-rate rail-to-rail CMOS input stage and its application to analogue cells for low voltage VLSI systems. IEEE Journal of Solid State Circuits, 32, (5), 701-712.

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Description/Abstract

A new rail-to-rail CMOS input architecture is presented that delivers behaviour nearly independent of the common-mode level in terms of both transconductance and slewing characteristics. Feedforward is used to achieve high common-mode bandwidth, and operation does not rely on analytic square law characteristics, making the technique applicable to deep submicron technologies. From the basis of a transconductor design, an asynchronous comparator and a video bandwidth op amp are also developed, providing a family of general purpose analog circuit functions which may be used in high (and low) bandwidth mixed-signal systems. Benefits for the system designer are that the need for rigorous control of common-mode levels is avoided and input signal swings right across the power supply range can be easily handled. A further benefit is that having very consistent performance, the circuits can be easily described in VHDL (or other behavioural language) to allow simulation of large mixed-signal systems. The circuits presented may be easily adapted for a range of requirements. Results are presented for representative transconductor, op amp, and comparator designs fabricated in a 0.5 um 3.3 V digital CMOS process.

Item Type: Article
ISSNs: 0018-9200
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > NANO
ePrint ID: 253304
Date Deposited: 09 Sep 2004
Last Modified: 27 Mar 2014 19:55
Publisher: IEEE EDS
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/253304

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