Proceedings of the Workshop on Verification and Computational Logic VCL'2000
Leuschel, Michael, Podelski, Andreas, Ramakrishnan, C.R. and Ultes-Nitsche, Ulrich (2000) Proceedings of the Workshop on Verification and Computational Logic VCL'2000. UNSPECIFIED , 150pp.
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Description/Abstract
The aim of this workshop is to bring together researchers working on the interplay between verification techniques (e.g., model checking, reduction, and abstraction) and logic programming techniques (e.g., constraints, abstract interpretation, program transformation).
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Additional Information: | Web page: http://www.ecs.soton.ac.uk/~mal/vcl2000.html Technical Report. Organisation: ALP Address: Technical Report of DSSE Research Group, University of Southampton (DSSE-TR-2000) |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science |
| Item ID: | 253709 |
| Date Deposited: | 18 Jun 2001 |
| Last Modified: | 02 Mar 2012 14:03 |
| Contributors: | Leuschel, Michael (Author) Podelski, Andreas (Author) Ramakrishnan, C.R. (Author) Ultes-Nitsche, Ulrich (Author) |
| Date: | July 2000 |
| Additional Information: | Web page: http://www.ecs.soton.ac.uk/~mal/vcl2000.html Technical Report. Organisation: ALP Address: Technical Report of DSSE Research Group, University of Southampton (DSSE-TR-2000) |
| Status: | Published |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/253709 |
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