Dynamic Memory Allocation in a VHDL Behavioural Synthesis System
Milton, D.J.D., Brown, A.D. and Williams, A.C. (2000) Dynamic Memory Allocation in a VHDL Behavioural Synthesis System. UNSPECIFIED , 45-52.
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Description/Abstract
VHDL is capable of describing the dynamic allocation of memory resources at �run-time�. This paper describes how this concept may be supported in a hardware synthesis environment. This requires a heap management system to be synthesised and implicitly accessed from within any user code, supporting the use of the VHDL access type. A method for controlling the storage of dynamic information (the heap manager) is reviewed. Issues such as timing and fragmentation are also discussed. An example of a design synthesised using the methods shown is reviewed last, which demonstrates the power of the technique.
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Additional Information: | Organisation: Forum on Design Languages 2000 (FDL 2000) |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > EEE |
| Item ID: | 254056 |
| Date Deposited: | 05 Jul 2001 |
| Last Modified: | 02 Mar 2012 12:20 |
| Contributors: | Milton, D.J.D. (Author) Brown, A.D. (Author) Williams, A.C. (Author) |
| Date: | September 2000 |
| Additional Information: | Organisation: Forum on Design Languages 2000 (FDL 2000) |
| Status: | Published |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/254056 |
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