Prest, M. J., Palmer, M. J., Braithwaite, G., Grasby, T. J., Phillips, P. J., Mironov, O. A., Parker, E. H. C., Whall, T. E., Waite, A. M. and Evans, A. G. R.
Si/Si0.64Ge0.36/Si pMOSFETs with Enhanced Voltage Gain and Low 1/f Noise.
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Si/Si0.64Fe0.36/Si p MOSFETs with written gate lengths in the range 0.5mu micron to 10mu micron have been fabricated in a reduced thermal budget variant of a standard CMOS process. The devices exhibit enhanced maximum voltage-gains and reduced 1/f noise as compared to silicon controls.
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