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Path testing of MOS circuits

Path testing of MOS circuits
Path testing of MOS circuits
158-183
Damper, R. I.
6e0e7fdc-57ec-44d4-bc0f-029d17ba441d
Burgess, N.
2e290a85-7733-415b-a97d-2157494ffaf6
Massara, R. E.
6683029b-1fee-4c05-b519-530cf93ce6af
Damper, R. I.
6e0e7fdc-57ec-44d4-bc0f-029d17ba441d
Burgess, N.
2e290a85-7733-415b-a97d-2157494ffaf6
Massara, R. E.
6683029b-1fee-4c05-b519-530cf93ce6af

Damper, R. I. and Burgess, N. (1989) Path testing of MOS circuits. Massara, R. E. (ed.) Design and Test Techniques for VLSI and WSI Circuits. pp. 158-183 .

Record type: Conference or Workshop Item (Other)

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More information

Published date: 1989
Additional Information: Address: London, UK
Venue - Dates: Design and Test Techniques for VLSI and WSI Circuits, 1989-01-01
Organisations: Southampton Wireless Group

Identifiers

Local EPrints ID: 256248
URI: http://eprints.soton.ac.uk/id/eprint/256248
PURE UUID: 48393cd1-ec38-41da-9026-85984dadcb1f

Catalogue record

Date deposited: 07 Jan 2002
Last modified: 10 Dec 2021 20:42

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Contributors

Author: R. I. Damper
Author: N. Burgess
Editor: R. E. Massara

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