Path testing of MOS circuits


Damper, R. I. and Burgess, N. (1989) Path testing of MOS circuits. Design and Test Techniques for VLSI and WSI Circuits Peter Peregrinus, 158-183.

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Item Type: Conference or Workshop Item (UNSPECIFIED)
Additional Information: Address: London, UK
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > Comms, Signal Processing & Control
ePrint ID: 256248
Date Deposited: 07 Jan 2002
Last Modified: 27 Mar 2014 19:58
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/256248

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