Algorithmic Complexity, SPeed and Architectural Parallelism in Low data-rate Visual Communications
Martinez, K. and Pearson, D. E. (1985) Algorithmic Complexity, SPeed and Architectural Parallelism in Low data-rate Visual Communications. UNSPECIFIED IEE/IERE, 185-191.
Full text not available from this repository.
Consideration is given to the tradeoff between algorithmic complexity and processing speed in primitive extraction for low data-rate visual communication. Initial experiments with serially-implemented algorithms on an MC68000 processor indicated the need for a high degree of parallelism in order to meet the requirements of real-time, moving-picture data rates. However, insight gained by trials on CLIP4, which typically showed speed gains of 40%, points to window-based architectures implemented using look-up tables.
|Item Type:||Conference or Workshop Item (UNSPECIFIED)|
|Divisions:||Faculty of Physical and Applied Science > Electronics and Computer Science > Web & Internet Science
|Date Deposited:||04 Feb 2002|
|Last Modified:||02 Mar 2012 12:38|
|Contributors:||Martinez, K. (Author)
Pearson, D. E. (Author)
|Further Information:||Google Scholar|
|RDF:||RDF+N-Triples, RDF+N3, RDF+XML, Browse.|
Actions (login required)