Useless Memory Allocation: Problems and Solutions

Gonciari, Paul Theo, Al-Hashimi, Bashir and Nicolici, Nicola (2002) Useless Memory Allocation: Problems and Solutions. Proceedings IEEE VLSI Test Symposium (VTS) IEEE Computer Society Press, 423-430.

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Unlike the existing research direction that focuses on useful test data reduction, this paper analyzes the useless test data memory requirements for system-on-a-chip test. The proposed solution to minimize the useless test memory is based on a new test methodology which combines a novel core wrapper design algorithm with a new test vector deployment procedure stored in the automatic test equipment (ATE). To reduce memory requirements, the proposed core wrapper design finds the minimum number of wrapper scan chain partitions such that the useless memory allocation is minimized in each partition, which facilitates efficient usage of ATE capabilities. Further, the new test vector deployment procedure provides a seamless integration with the ATE. When compared to the previously proposed core wrapper design algorithms, the proposed test methodology reduces the memory requirements up to 45%, without any penalties in test area overhead.

Item Type: Conference or Workshop Item (UNSPECIFIED)
Additional Information: Address: Monterey, CA
Divisions : Faculty of Physical Sciences and Engineering > Electronics and Computer Science > Electronic & Software Systems
ePrint ID: 256352
Accepted Date and Publication Date:
April 2002Published
Date Deposited: 15 May 2002
Last Modified: 31 Mar 2016 13:56
Further Information:Google Scholar

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