Automated high level synthesis of hardware building blocks present in ART--based neural networks, from VHDL--AMS descriptions

Lopez, J. A., Asensi, G. D., Ruiz, R. and Kazmierski, T.J. (2002) Automated high level synthesis of hardware building blocks present in ART--based neural networks, from VHDL--AMS descriptions. Proc. ISCAS'2002.

Abstract

This contribution presents a VHDL--AMS model from a building block present in multichannel neural network based on the adaptive resonance theory, and its automated synthesis using VHDL--AMS to hspice netlist translator. This building block shows continuous dynamic behaviour, and it is complex enough to check the functionality of our translator. Both simulations, behavioural high level based on the VHDL--AMS model and structural based on SPICE automatically synthesized description, have been done in order to check the matching between the SPICE netlist synthesized against its VHDL--AMS model.

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