SYNTHESIS AND OPTIMIZATION OF ANALOG VLSI FILTERS FROM VHDL-AMS PARSE TREES
Hamid, F.A. and Kazmierski, T.J. (2002) SYNTHESIS AND OPTIMIZATION OF ANALOG VLSI FILTERS FROM VHDL-AMS PARSE TREES. Proc. ISCAS'2002
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Description/Abstract
This contribution presents a new technique for synthesis and optimization of VLSI bandpass filter in Gigahertz frequency range. We present synthesis examples of silicon LC filters and fourth-order RC filters using positive-feedback bootstrapping circuits. The filter characteristics are defined using a high-level behavioral description in VHDL-AMS. The architectural synthesis is done by the identification of synthesizable constructs from a VHDL-AMS parse tree. The netlists produced by the architectural synthesizer is subsequently subjected to parametric optimization, using HSPICE simulations in the optimization loop, for improved performance.
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > EEE |
| Item ID: | 256524 |
| Date Deposited: | 25 Apr 2002 |
| Last Modified: | 01 Mar 2012 10:48 |
| Contributors: | Hamid, F.A. (Author) Kazmierski, T.J. (Author) |
| Date: | May 2002 |
| Status: | Published |
| Further Information: | Google Scholar |
| ISI Citation Count: | 0 |
| URI: | http://eprints.soton.ac.uk/id/eprint/256524 |
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