Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages


Wilson, P R, Kilic, Y, Ross, J N, Zwolinski, M and Brown, A D (2001) Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages. In, Behavioral Modeling and Simulation Workshop

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Description/Abstract

The use of behavioural modelling for operational amplifiers has been well known for many years and previous work has included modelling of specific fault conditions using a macro-model. In this paper, the models are implemented in a more abstract form using analogue Hardware Description Languages (HDLs), including MAST, taking advantage of the ability to control the behaviour of the model using high-level fault condition states. The implementation method allows a range of fault conditions to be integrated without switching to a completely new model. The various transistor faults are categorised, and used to characterise the behaviour of the HDL models. Simulations compare the accuracy and speed of the transistor and behavioural level models under a set of representative fault conditions.

Item Type: Conference or Workshop Item (Paper)
Additional Information: CD-ROM. Organisation: IEEE/ACM
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > EEE
Item ID: 257348
Date Deposited: 06 May 2003
Last Modified: 15 Aug 2012 03:07
Contributors: Wilson, P R (Author)
Kilic, Y (Author)
Ross, J N (Author)
Zwolinski, M (Author)
Brown, A D (Author)
Date: 2001
Additional Information: CD-ROM. Organisation: IEEE/ACM
Status: Published
Further Information:Google Scholar
ISI Citation Count:0
URI: http://eprints.soton.ac.uk/id/eprint/257348

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