Investigating 50nm channel length vertical MOSFET's containing a dielectric pocket in a circuit environment


Donaghy, DC, Hall, S, Kunz, VD, Groot, CH de and Ashburn, P (2002) Investigating 50nm channel length vertical MOSFET's containing a dielectric pocket in a circuit environment. ESSDERC 2002, Florence, , 499-502.

This is the latest version of this item.

Download

[img] PDF
Download (252Kb)
Item Type: Conference or Workshop Item (UNSPECIFIED)
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > NANO
ePrint ID: 257759
Date Deposited: 26 Jun 2003
Last Modified: 27 Mar 2014 19:59
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/257759

Available Versions of this Item

  • Investigating 50nm channel length vertical MOSFET's containing a dielectric pocket in a circuit environment. (deposited 26 Jun 2003) [Currently Displayed]

Actions (login required)

View Item View Item