Power-conscious test synthesis and scheduling
Power-conscious test synthesis and scheduling
BIST increases circuit activity and hence power in data path circuits. The voltage drop that occurs during testing causes some good circuits to fail the testing process, leading to unnecessary manufacturing yield loss. Addressing this problem, the authors show how test synthesis and scheduling affect power dissipation and present new power-conscious algorithms.
Low power VLSI test
48-55
Nicolici, Nicola
61efa5a6-7da8-4c33-8e68-2679a9bb0871
Al-Hashimi, Bashir M
0b29c671-a6d2-459c-af68-c4614dce3b5d
July 2002
Nicolici, Nicola
61efa5a6-7da8-4c33-8e68-2679a9bb0871
Al-Hashimi, Bashir M
0b29c671-a6d2-459c-af68-c4614dce3b5d
Nicolici, Nicola and Al-Hashimi, Bashir M
(2002)
Power-conscious test synthesis and scheduling.
IEEE Proceedings of Design and Test of Computers, 20 (4), .
Abstract
BIST increases circuit activity and hence power in data path circuits. The voltage drop that occurs during testing causes some good circuits to fail the testing process, leading to unnecessary manufacturing yield loss. Addressing this problem, the authors show how test synthesis and scheduling affect power dissipation and present new power-conscious algorithms.
This record has no associated files available for download.
More information
Published date: July 2002
Additional Information:
A preliminary version of this paper has won "Besaung Best Paper Award", IEEE International Test Conference 2000
Keywords:
Low power VLSI test
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 258330
URI: http://eprints.soton.ac.uk/id/eprint/258330
ISSN: 0740-7475
PURE UUID: bd4f3eb7-d38e-4c3d-bea8-b82ad00cee50
Catalogue record
Date deposited: 10 Oct 2003
Last modified: 08 Jan 2022 08:51
Export record
Contributors
Author:
Nicola Nicolici
Author:
Bashir M Al-Hashimi
Download statistics
Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.
View more statistics