Power-Conscious Design Methodology for Class-A Switched-Current Wave Filters
Wilcock, R and Al-Hashimi, B. M. (2004) Power-Conscious Design Methodology for Class-A Switched-Current Wave Filters. In, IEEE International Symposium on Circuits and Systems, Vancouver, Canada,
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Description/Abstract
This paper addresses power consumption in switched-current filters, designed using the wave filter technique and Class-A memory cells. It has been demonstrated that power consumption can be reduced through the proposed two stage bias and signal current scaling method, whilst ensuring no degradation in filter total harmonic distortion. Two full transistor-level filter case studies using 0.6um 3.3V BSim3v3 CMOS foundry models are given to demonstrate the method, with additional simulation results for filters of different types and orders showing power savings as high as 16.6%. One case study has been fabricated, with measured silicon results confirming simulated savings.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > Electronic & Software Systems Faculty of Physical and Applied Science > Electronics and Computer Science > EEE |
| Item ID: | 258768 |
| Date Deposited: | 23 Jan 2004 |
| Last Modified: | 02 Mar 2012 03:03 |
| Contributors: | Wilcock, R (Author) Al-Hashimi, B. M. (Author) |
| Date: | 2004 |
| Status: | Published |
| Further Information: | Google Scholar |
| ISI Citation Count: | 0 |
| URI: | http://eprints.soton.ac.uk/id/eprint/258768 |
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