Brown, AD and Zwolinski, M
Behavioural modelling of analogue faults in VHDL-AMS - A case study.
In, 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, Vancouver, Canada,
23 - 26 May 2004.
Analogue fault simulation is needed to evaluate the quality of tests, but is very computationally intensive. Behavioural simulation is more abstract and thus faster than fault simulation. Using a phase-locked loop as a case study, we show how behavioural fault models can be derived from transistor-level fault simulations and that faulty behaviour can be accurately modeled.
Conference or Workshop Item
|| Event Dates: MAY 23-26, 2004
||fault simulation hardware description languages integrated circuit modelling mixed analogue-digital integrated circuits phase locked loops VHDL-AMS analogue fault simulation behavioural analogue fault modelling behavioural fault models behavioural simulation faulty behaviour modelling intensive computation phase-locked loop transistor-level fault simulation
||Faculty of Physical Sciences and Engineering > Electronics and Computer Science > EEE
|Accepted Date and Publication Date:
||27 Jan 2005
||31 Mar 2016 14:02
|Further Information:||Google Scholar|
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