Behavioural modelling of analogue faults in VHDL-AMS - A case study
Brown, AD and Zwolinski, M (2004) Behavioural modelling of analogue faults in VHDL-AMS - A case study. In, 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, Vancouver, Canada, 23 - 26 May 2004. IEEE, V632-V635.
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Description/Abstract
Analogue fault simulation is needed to evaluate the quality of tests, but is very computationally intensive. Behavioural simulation is more abstract and thus faster than fault simulation. Using a phase-locked loop as a case study, we show how behavioural fault models can be derived from transistor-level fault simulations and that faulty behaviour can be accurately modeled.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Additional Information: | Event Dates: MAY 23-26, 2004 |
| Keywords: | fault simulation hardware description languages integrated circuit modelling mixed analogue-digital integrated circuits phase locked loops VHDL-AMS analogue fault simulation behavioural analogue fault modelling behavioural fault models behavioural simulation faulty behaviour modelling intensive computation phase-locked loop transistor-level fault simulation |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > EEE |
| Item ID: | 260391 |
| Date Deposited: | 27 Jan 2005 |
| Last Modified: | 02 Mar 2012 01:31 |
| Contributors: | Brown, AD (Author) Zwolinski, M (Author) |
| Date: | 2004 |
| Additional Information: | Event Dates: MAY 23-26, 2004 |
| Status: | Published |
| Publisher: | IEEE |
| Further Information: | Google Scholar |
| ISI Citation Count: | 0 |
| URI: | http://eprints.soton.ac.uk/id/eprint/260391 |
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