Recent Advances in Verification, Equivalence Checking and SAT-Solvers
Pradhan, Dhiraj K., Abadir, Magdy S. and Varea, Mauricio (2005) Recent Advances in Verification, Equivalence Checking and SAT-Solvers. At 18th International Conference on VLSI Design, Kolkata, India, 03 - 07 Jan 2005. IEEE Computer Society, 14.
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| Item Type: | Conference or Workshop Item (Speech) |
|---|---|
| Additional Information: | Event Dates: 3-7 January 2005 |
| ISBNs: | 0769522645 |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science |
| Item ID: | 260652 |
| Date Deposited: | 07 Mar 2005 |
| Last Modified: | 02 Mar 2012 13:42 |
| Contributors: | Pradhan, Dhiraj K. (Author) Abadir, Magdy S. (Author) Varea, Mauricio (Author) |
| Date: | 2005 |
| Additional Information: | Event Dates: 3-7 January 2005 |
| Status: | Published |
| Publisher: | IEEE Computer Society |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/260652 |
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