Power Aware Learning for Class AB Analogue VLSI Neural Network
Power Aware Learning for Class AB Analogue VLSI Neural Network
Recent research into Artificial Neural Networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumption of ANN hardware is a very significant implementation issue. This paper proposes a learning mechanism suitable for low-power class AB type analogue ANN that not only tunes the network to obtain minimum error, but also adaptively learns to reduce power consumption. Our experiments show substantial reductions in the power budget (30% to 50%) for a variety of example networks as a result of our power-aware learning.
Artificial Neural Networks, ANN hardware, Low-power, Power-aware, learning
Modi, Sankalp
28a7f336-f2b6-4a5e-8d9a-7c0ed64194b9
Wilson, Peter
8a65c092-c197-4f43-b8fc-e12977783cb3
Brown, Andrew
5c19e523-65ec-499b-9e7c-91522017d7e0
2006
Modi, Sankalp
28a7f336-f2b6-4a5e-8d9a-7c0ed64194b9
Wilson, Peter
8a65c092-c197-4f43-b8fc-e12977783cb3
Brown, Andrew
5c19e523-65ec-499b-9e7c-91522017d7e0
Modi, Sankalp, Wilson, Peter and Brown, Andrew
(2006)
Power Aware Learning for Class AB Analogue VLSI Neural Network.
IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece.
21 - 24 May 2006.
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Conference or Workshop Item
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Abstract
Recent research into Artificial Neural Networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumption of ANN hardware is a very significant implementation issue. This paper proposes a learning mechanism suitable for low-power class AB type analogue ANN that not only tunes the network to obtain minimum error, but also adaptively learns to reduce power consumption. Our experiments show substantial reductions in the power budget (30% to 50%) for a variety of example networks as a result of our power-aware learning.
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Published date: 2006
Additional Information:
Event Dates: May 21-24, 2006
Venue - Dates:
IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece, 2006-05-21 - 2006-05-24
Keywords:
Artificial Neural Networks, ANN hardware, Low-power, Power-aware, learning
Organisations:
EEE
Identifiers
Local EPrints ID: 262564
URI: http://eprints.soton.ac.uk/id/eprint/262564
PURE UUID: eed41e27-8a04-47b3-b803-2a14eb413a0d
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Date deposited: 12 May 2006
Last modified: 14 Mar 2024 07:13
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Contributors
Author:
Sankalp Modi
Author:
Peter Wilson
Author:
Andrew Brown
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