Ahmadi, Arash and Zwolinski, Mark
Area Word-Length Trade off in DSP Algorithm Implementation and Optimization.
In, IEE/EURASIP Conference on DSPenabledRadio, Southampton, UK,
19 - 20 Sep 2005.
This paper proposes a frame work for High Level Synthesis of DSP algorithms with emphasis on differences between DSP systems and other digital systems. Accordingly a multiple word length has been used to optimize the system digital noise and area trade off. Based on a proposed architecture, required cost function, synthesiser and optimizer and intermediate data bases have been introduced and implemented. Optimization has been done by an optimizer based on Genetic Algorithm
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