Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis
Dilillo, Luigi, Hashimi, B. M., Rosinger, Paul and Girard, Patrick (2006) Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis. At International Design and Test Workshop, Duday, 19 - 20 Nov 2006.
| PDF 443Kb |
Description/Abstract
In this paper we study the impact of leakage currents on the operation of SRAM memories fabricated using nanoscale technologies. We show how the leakage currents, flowing through the pass transistors of unselected cells, may affect the read operation causing Leakage Read Faults (LRFs). The results of extensive Spice simulation on a 65nm SRAM are analyzed to evaluate the occurrence of the LRF for different operating conditions including supply voltage, temperature and frequency. Furthermore, the test requirements to cover LRFs are given and a low complexity (∼2N) March test is proposed for diagnostic purposes.
| Item Type: | Conference or Workshop Item (Speech) |
|---|---|
| Additional Information: | Event Dates: 19-20 November 2006 |
| Uncontrolled Keywords: | SRAM, Leakage Currents, Read operation, March test |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > Electronic & Software Systems |
| ePrint ID: | 263219 |
| Deposited On: | 30 Nov 2006 |
| Last Modified: | 02 Mar 2012 12:59 |
| Further Information: | Google Scholar |
Associated Staff Only: edit my ePrint
