A novel 64-point FFT/IFFT processor for IEEE 802.11(a) standard

Maharatna, Koushik, Grass, Eckhard and Jagdhold, Ulrich (2003) A novel 64-point FFT/IFFT processor for IEEE 802.11(a) standard. In, IEEE International Conference in Acoustic, Speech and Signal Processing (ICASSP) 2003, Hong Kong, , 321-324.


[img] PDF
Download (107Kb)


A novel 64-point FFT/IFFT processor is presented in this article, named TURBO64, developed primarily for the application for the IEEE 802.11(a) standard. The processor does not use any digital multiplier or RAM. It has been fabricated and tested successfully. Its core area is 6.8 mm2 and the average power consumption is 41 mW at 1.8 V @ 20 MHz frequency. Compared to some other existing IP cores and ASIC chips TURBO64 needs a smaller number of clock cycles and consumes less power.

Item Type: Conference or Workshop Item (Paper)
Keywords: FFT, low power, WLAN
Divisions : Faculty of Physical Sciences and Engineering > Electronics and Computer Science > Electronic & Software Systems
ePrint ID: 263551
Accepted Date and Publication Date:
Date Deposited: 19 Feb 2007
Last Modified: 31 Mar 2016 14:07
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/263551

Actions (login required)

View Item View Item

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics