Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates
Maharatna, Koushik and Banerjee, Swapna (1998) Low Voltage/Low Power CORDIC based DHT chip implemented using Transmission Gate Logic on Sea of Gates. In, Int’l Conference on Computers and Devices for Communication (CODEC) 1998, Calcutta, India, , 154-157.
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| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > Electronic & Software Systems |
| Item ID: | 263562 |
| Date Deposited: | 19 Feb 2007 |
| Last Modified: | 02 Mar 2012 13:20 |
| Contributors: | Maharatna, Koushik (Author) Banerjee, Swapna (Author) |
| Date: | 1998 |
| Status: | Published |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/263562 |
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