High-speed and Non-volatile Memory Devices Using a Macroscopic Polarized Stack Consisting of Double Floating Gates Interconnected with Engineered Tunnel Oxide Barriers


Tsuchiya, Yoshishige, Kurihara, T., Saito, D., Niikura, H., Mizuta, Hiroshi and Oda, S. (2007) High-speed and Non-volatile Memory Devices Using a Macroscopic Polarized Stack Consisting of Double Floating Gates Interconnected with Engineered Tunnel Oxide Barriers. At IEEE Silicon Nanoelectronics Workshop, Kyoto, , pp 145-146.

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Item Type: Conference or Workshop Item (Poster)
Additional Information: Event Dates: June 2007
Divisions: Faculty of Physical and Applied Science > Electronics and Computer Science > NANO
Item ID: 266282
Date Deposited: 23 Jul 2008 09:43
Last Modified: 02 Mar 2012 14:04
Contributors: Tsuchiya, Yoshishige (Author)
Kurihara, T. (Author)
Saito, D. (Author)
Niikura, H. (Author)
Mizuta, Hiroshi (Author)
Oda, S. (Author)
Date: June 2007
Additional Information: Event Dates: June 2007
Status: Published
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/266282

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