Acharyya, Amit, Maharatna, Koushik, Al-Hashimi, Bashir and Gunn, Steve (2009) Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry. IEEE Transactions on Circuits and Systems II: Express Briefs, 56 (4), 285-289.
Record type:
Article
More information
Published date: 21 April 2009
Keywords:
Distributed Arithmetic, Low Power Architecture, Multiplierless Implementation, Very Large Scale Integration, Wavelet
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 267280
URI: http://eprints.soton.ac.uk/id/eprint/267280
PURE UUID: 5acb79d2-6bb9-4790-b233-210be2948c51
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Date deposited: 18 Apr 2009 19:22
Last modified: 14 Mar 2024 08:46
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Contributors
Author:
Amit Acharyya
Author:
Koushik Maharatna
Author:
Bashir Al-Hashimi
Author:
Steve Gunn
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