Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry
Acharyya, Amit, Maharatna, Koushik, Al-Hashimi, Bashir and Gunn, Steve (2009) Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry. IEEE Transactions on Circuits and Systems- II: Express Briefs, 56, (4), 285-289.
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| Item Type: | Article |
|---|---|
| Keywords: | Distributed Arithmetic, Low Power Architecture, Multiplierless Implementation, Very Large Scale Integration, Wavelet |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > Electronic & Software Systems |
| Item ID: | 267280 |
| Date Deposited: | 18 Apr 2009 19:22 |
| Last Modified: | 23 Jul 2012 03:42 |
| Contributors: | Acharyya, Amit (Author) Maharatna, Koushik (Author) Al-Hashimi, Bashir (Author) Gunn, Steve (Author) |
| Date: | 21 April 2009 |
| Status: | Published |
| Publisher: | IEEE |
| Further Information: | Google Scholar |
| ISI Citation Count: | 7 |
| URI: | http://eprints.soton.ac.uk/id/eprint/267280 |
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