Engineering of heterostructured tunnel barrier for non-volatile memory applications: potential of Pr-based heterostructured barrier as a tunneling oxide


Kurihara, T, Nagahama, Y, Kobayashi, D, Niikura, H, Tsuchiya, Yoshishige, Mizuta, Hiroshi, Nohira, H, Uchida, K and Oda, S (2009) Engineering of heterostructured tunnel barrier for non-volatile memory applications: potential of Pr-based heterostructured barrier as a tunneling oxide. At IEEE Silicon Nanoelectronics Workshop 2009, Kyoto, 13 - 14 Jun 2009.

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Item Type: Conference or Workshop Item (Poster)
Additional Information: Event Dates: 13-14 June 2009
Divisions: Faculty of Physical and Applied Science > Electronics and Computer Science > NANO
Item ID: 267371
Date Deposited: 14 May 2009 16:17
Last Modified: 02 Mar 2012 12:41
Contributors: Kurihara, T (Author)
Nagahama, Y (Author)
Kobayashi, D (Author)
Niikura, H (Author)
Tsuchiya, Yoshishige (Author)
Mizuta, Hiroshi (Author)
Nohira, H (Author)
Uchida, K (Author)
Oda, S (Author)
Date: 13 June 2009
Additional Information: Event Dates: 13-14 June 2009
Status: Published
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/267371

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