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Engineering of heterostructured tunnel barrier for non-volatile memory applications: potential of Pr-based heterostructured barrier as a tunneling oxide

Engineering of heterostructured tunnel barrier for non-volatile memory applications: potential of Pr-based heterostructured barrier as a tunneling oxide
Engineering of heterostructured tunnel barrier for non-volatile memory applications: potential of Pr-based heterostructured barrier as a tunneling oxide
Kurihara, T
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Nagahama, Y
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Kobayashi, D
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Niikura, H
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Tsuchiya, Yoshishige
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Mizuta, Hiroshi
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Nohira, H
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Uchida, K
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Oda, S
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Kurihara, T
d9edcb92-e56b-428c-8ea5-eb91ed001b7d
Nagahama, Y
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Kobayashi, D
ddf51d90-d668-4e66-a13b-1a8e6454417e
Niikura, H
855f794b-a546-4cde-b658-ceb48b40a142
Tsuchiya, Yoshishige
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Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Nohira, H
6153ef31-aace-452f-a86e-68f637905e78
Uchida, K
94591838-45bd-426b-91da-f9d60a055c6c
Oda, S
514339b3-f8de-4750-8d20-c520834b2477

Kurihara, T, Nagahama, Y, Kobayashi, D, Niikura, H, Tsuchiya, Yoshishige, Mizuta, Hiroshi, Nohira, H, Uchida, K and Oda, S (2009) Engineering of heterostructured tunnel barrier for non-volatile memory applications: potential of Pr-based heterostructured barrier as a tunneling oxide. IEEE Silicon Nanoelectronics Workshop 2009, Kyoto. 13 - 14 Jun 2009.

Record type: Conference or Workshop Item (Poster)
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More information

Published date: 13 June 2009
Additional Information: Event Dates: 13-14 June 2009
Venue - Dates: IEEE Silicon Nanoelectronics Workshop 2009, Kyoto, 2009-06-13 - 2009-06-14
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 267371
URI: http://eprints.soton.ac.uk/id/eprint/267371
PURE UUID: 647f7afc-553b-416c-8b20-410e693c4d27

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Date deposited: 14 May 2009 16:17
Last modified: 14 Mar 2024 08:49

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Contributors

Author: T Kurihara
Author: Y Nagahama
Author: D Kobayashi
Author: H Niikura
Author: Yoshishige Tsuchiya
Author: Hiroshi Mizuta
Author: H Nohira
Author: K Uchida
Author: S Oda

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