Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning
Li, Xiaoli, Husain, Muhammad, Kiziroglou, Michail and De Groot, Kees (2009) Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning. Microelectronic Engineering, 86, (7-9), 1599-1602.
To achieve high performance Ge nMOSFETs it is necessary to reduce the metal/semiconductor Schottky barrier heights at the source and drain. Ni/Ge and NiGe/Ge Schottky barriers are fabricated by electrodeposition using n-type Ge substrates. Current (I)–voltage (V) and capacitance (C)–voltage (V) and low temperature I–V measurements are presented. A high-quality Schottky barrier with extremely low reverse leakage current is revealed. The results are shown to fit an inhomogeneous barrier model for thermionic emission over a Schottky barrier. A mean value of 0.57 eV and a standard deviation of 52 meV is obtained for the Schottky barrier height at room temperature. A likely explanation for the distribution of the Schottky barrier height is the spatial variation of the metal induced gap states at the Ge surface due to a variation in interfacial oxide thickness, which de-pins the Fermi level.
|Divisions:||Faculty of Physical and Applied Science > Electronics and Computer Science > NANO
|Date Deposited:||29 May 2009 06:35|
|Last Modified:||23 Jul 2012 03:47|
|Contributors:||Li, Xiaoli (Author)
Husain, Muhammad (Author)
Kiziroglou, Michail (Author)
De Groot, Kees (Author)
|Further Information:||Google Scholar|
|ISI Citation Count:||5|
|RDF:||RDF+N-Triples, RDF+N3, RDF+XML, Browse.|
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