Suspended Gate Silicon Nanodots memory
Garcia-Ramirez, Mario A., Yoshimura, Hideo, Tsuchiya, Yoshishige and Mizuta, Hiroshi (2008) Suspended Gate Silicon Nanodots memory. At ESSDERC/CIRC Fringe (ESS-Fringe), Edinburgh, ESSDERC, p19.
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Description/Abstract
This paper proposes a new non-volatile semiconductor memory which features a suspended gate integrated with silicon nanocrystals dots as a floating gate and the MOSFET as a readout. Performing three-dimensional finite element simulations combined with an analytical plate-capacitor model, we clarify the pull-in/pull-out operation of the suspended gate. We also show the dependence of the hysteresis cycle characteristics on material and structural parameters.
| Item Type: | Conference or Workshop Item (Poster) |
|---|---|
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > NANO |
| Item ID: | 267426 |
| Date Deposited: | 30 May 2009 15:55 |
| Last Modified: | 02 Mar 2012 12:22 |
| Contributors: | Garcia-Ramirez, Mario A. (Author) Yoshimura, Hideo (Author) Tsuchiya, Yoshishige (Author) Mizuta, Hiroshi (Author) |
| Date: | 15 September 2008 |
| Status: | Published |
| Publisher: | ESSDERC |
| Contact Email Address: | magr07r@ecs.soton.ac.uk |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/267426 |
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