Voltage-limitation-free analytical single-electron transistor model incorporating the effects of spin-degenerate discrete energy states


Pruvost, B, Mizuta, H and Oda, S (2008) Voltage-limitation-free analytical single-electron transistor model incorporating the effects of spin-degenerate discrete energy states. JOURNAL OF APPLIED PHYSICS, 103, -.

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Description/Abstract

A physically based analytical single-electron transistor (SET) model is proposed. This model virtually shows no voltage limitation in the scope of the orthodox theory, which makes it particularly suitable for hybrid simulation where the SET is biased by a current source. The model is verified against Monte Carlo simulation with excellent agreement and compared to existing models. It is found that our model is valid and accurate whatever the drain voltage and faster than reported models on the whole. A way to integrate into the model the effects of spin-degenerate quantum energy level discreteness, in the case of a silicon-based SET, is also introduced and observed quantum mechanical effects, such as negative differential conductance, are discussed. (C) 2008 American Institute of Physics.

Item Type: Article
Additional Information: Imported from ISI Web of Science
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > NANO
Item ID: 269201
Date Deposited: 21 Apr 2010 07:46
Last Modified: 02 Mar 2012 11:41
Contributors: Pruvost, B (Author)
Mizuta, H (Author)
Oda, S (Author)
Date: 2008
Additional Information: Imported from ISI Web of Science
Status: Unpublished
Further Information:Google Scholar
ISI Citation Count:3
URI: http://eprints.soton.ac.uk/id/eprint/269201

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