Yield improvement using configurable analogue transistors


Wilson, PR and Wilcock, R (2008) Yield improvement using configurable analogue transistors. ELECTRONICS LETTERS, 44, 1132-1133.

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Description/Abstract

Continued process scaling has led to significant yield and reliability challenges for today's designers. Analogue circuits are particularly susceptible to poor variation, driving the need for new yield resilient techniques in this area. A new configurable analogue transistor structure and supporting methodology that facilitates variation compensation at the post-manufacture stage is described. The approach has demonstrated significant yield improvements and can be applied to any analogue circuit.

Item Type: Article
Additional Information: Imported from ISI Web of Science
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science
ePrint ID: 269506
Date Deposited: 21 Apr 2010 07:46
Last Modified: 28 Mar 2014 15:25
Projects:
Configurable Analogue Transistors: Conquering Unreliability in a Shrinking World
Funded by: EPSRC (EP/H014608/1)
Led by: Peter Wilson
13 February 2010 to 12 August 2013
Further Information:Google Scholar
ISI Citation Count:1
URI: http://eprints.soton.ac.uk/id/eprint/269506

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