VLSI ARCHITECTURE FOR FETAL ECG EXTRACTION FOR PERSONALIZED HEALTHCARE APPLICATION WITHIN RESOURCE CONSTRAINED ENVIRONMENT

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Description/Abstract

This paper proposes a novel VLSI architecture for Fetal ECG extraction for personalized healthcare application within a mobile homecare medical device in the resource constrained environment. Novelty of this architecture lies in the application of recently proposed memory-efficient, parameterized, multiplierless Discrete Wavelet Transform and simplified decision making logic of the complex Fuzzy membership function computation method for robust and reliable detection and removal of maternal modulus maxima peaks from the composite abdominal signal. The memory efficiency is achieved in terms of reduction in memory size and nearly linear, instead of exponential, growth of memory requirement with the increase in incoming dataframe length. The simplification of the Fuzzy membership function is achieved by exploiting the inherent time-stamp information of several levels of the Discrete Wavelet Transform analysis bank. The proposed architecture is more effective for longer frames. The generic memory model implemented, will provide the flexibility to configure the on-chip memory with any type of orthonormal wavelets suitable for different applications.