The impact of variability on the reliability of long on-chip interconnect in the presence of crosstalk
Halak, Basel, Shedabale, Santosh , Ramakrishnan, Hiran , Yakovlev, Alex and Russell, Gordon (2008) The impact of variability on the reliability of long on-chip interconnect in the presence of crosstalk. At SLIP '08 Proceedings of the 2008 international workshop on System level interconnect prediction ACM New York, NY, USA ©2008.
- Published Version
Restricted to Registered users only
Download (365Kb) | Request a copy
With deep submicron technologies, the importance of interconnect parasitics on delay and noise has been an ever increasing trend. Consequently the variation in interconnect parameters have a larger impact on final timing and functional yield of the product. We present a comprehensive analysis to quantify the impact of parametric variations on the reliability of global interconnect links in the presence of crosstalk. The impact of parametric variations on wire delay and crosstalk noise is studied for a global interconnect structure in 90nm UMC technology, followed by a novel technique to estimate the bit error rate (BER) of such links. This methodology is employed to explore the design space of interconnect channels in order to mitigate the impact of variability.
|Item Type:||Conference or Workshop Item (Speech)|
|Divisions:||Faculty of Physical Sciences and Engineering > Electronics and Computer Science > EEE
|Date Deposited:||06 Apr 2011 11:47|
|Last Modified:||27 Mar 2014 20:17|
|Publisher:||ACM New York, NY, USA ©2008|
|Contact Email Address:||email@example.com|
|Further Information:||Google Scholar|
|ISI Citation Count:||2|
|RDF:||RDF+N-Triples, RDF+N3, RDF+XML, Browse.|
Actions (login required)