Hybrid Numerical Analysis of a high-speed non-volatile Suspended Gate Silicon Nanodot Memory


Garcia Ramirez, Mario, Tsuchiya, Yoshishige and Mizuta, Hiroshi (2011) Hybrid Numerical Analysis of a high-speed non-volatile Suspended Gate Silicon Nanodot Memory. Journal of Computational Electronics, 10, (1), 248-257.

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Description/Abstract

We present a hybrid numerical analysis of a high-speed and non-volatile suspended gate silicon nanodot memory (SGSNM) which co-integrates a nano-electromechanical (NEM) control gate with a MOSFET as a readout element and silicon nanodots as a floating gate. A hybrid NEM-MOS circuit simulation is developed by taking account of the pull-in/pull-out operation of the suspended gate and electron tunnelling processes through the tunnel oxide layer as behavioural models. The signals for programming, erasing and reading are successfully achieved at circuit level simulation. The programming and erasing times are found as short as 2.5 nsec for a SGSNM with a 1-μm-long suspended gate, which is a summation of the mechanical pull-in/pull-out times and the tunnel charging/discharging times.

Item Type: Article
ISSNs: 101007108250110361
Keywords: Non- Volatile Memory, NEMS, Hybrid Circuit Analysis, Suspended Gate Structure,
Divisions: Faculty of Physical and Applied Science > Electronics and Computer Science > NANO
Item ID: 272344
Date Deposited: 25 May 2011 10:58
Last Modified: 19 Jul 2012 12:41
Contributors: Garcia Ramirez, Mario (Author)
Tsuchiya, Yoshishige (Author)
Mizuta, Hiroshi (Author)
Date: May 2011
Status: Published
Publisher: Springer
Further Information:Google Scholar
ISI Citation Count:0
URI: http://eprints.soton.ac.uk/id/eprint/272344

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