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Simultaneous switching noise: the relation between bus layout and coding

Simultaneous switching noise: the relation between bus layout and coding
Simultaneous switching noise: the relation between bus layout and coding
As device geometries shrink and power supply voltages decrease, simultaneous switching noise (SSN) is having a detrimental effect on IC reliability. This article analyzes the impact of different bus transitions on SSN. Transitions involving the same number of switching signals, but with different placement of switching wires (different switching patterns) within the bus, can induce considerably different levels of SSN. The authors evaluate how SSN varies as a function of the number of switching wires, for different values of wire capacitances. They find that a piecewise linear dependency exists between the SSN and the number of switching wires when the coupling capacitance between adjacent wires is taken into account. Additionally, they analyze the impact of the switching patterns on the effectiveness of the coding techniques that are often proposed to reduce the amount of switching wires and hence SSN. They show that switching-pattern and layout considerations have a significant impact on coding performance. The authors perform their analysis considering realistic bus and power supply network models, both implemented using standard 0.13-micron CMOS technology.
0740-7475
76-86
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Niewland, Andre'
cb9c3cc1-18b0-47ad-80ef-528551b214c5
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Niewland, Andre'
cb9c3cc1-18b0-47ad-80ef-528551b214c5
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae

Rossi, Daniele, Niewland, Andre' and Metra, Cecilia (2008) Simultaneous switching noise: the relation between bus layout and coding. IEEE Design & Test of Computers, 25 (1), 76-86. (doi:10.1109/MDT.2008.25).

Record type: Article

Abstract

As device geometries shrink and power supply voltages decrease, simultaneous switching noise (SSN) is having a detrimental effect on IC reliability. This article analyzes the impact of different bus transitions on SSN. Transitions involving the same number of switching signals, but with different placement of switching wires (different switching patterns) within the bus, can induce considerably different levels of SSN. The authors evaluate how SSN varies as a function of the number of switching wires, for different values of wire capacitances. They find that a piecewise linear dependency exists between the SSN and the number of switching wires when the coupling capacitance between adjacent wires is taken into account. Additionally, they analyze the impact of the switching patterns on the effectiveness of the coding techniques that are often proposed to reduce the amount of switching wires and hence SSN. They show that switching-pattern and layout considerations have a significant impact on coding performance. The authors perform their analysis considering realistic bus and power supply network models, both implemented using standard 0.13-micron CMOS technology.

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Published date: January 2008
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 368680
URI: http://eprints.soton.ac.uk/id/eprint/368680
ISSN: 0740-7475
PURE UUID: d73bb24a-226f-430d-b846-1e75fb10f43a

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Date deposited: 09 Sep 2014 15:57
Last modified: 14 Mar 2024 17:51

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Contributors

Author: Daniele Rossi
Author: Andre' Niewland
Author: Cecilia Metra

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