NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating
NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating
In this paper we show that power gating techniques become more effective during their lifetime, since the aging of sleep transistors (STs) due to negative bias temperature instability (NBTI) drastically reduces leakage power. Based on this property, we propose an NBTI and leakage aware ST design method for reliable and energy efficient power gating. Through SPICE simulations, we show lifetime extension up to 19.9x and average leakage power reduction up to 14.4% compared to standard STs design approach without additional area overhead.
Finally, when a maximum 10-year lifetime target is considered, we show that the proposed method allows multiple beneficial options compared to a standard STs design method: either to improve circuit operating frequency up to 9.53% or to reduce ST area overhead up to 18.4%
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Tenentes, Vasileios
1bff9ebc-9186-438b-850e-6c738994fa39
Khursheed, Saqib
0c4e3d52-0df5-43d9-bafe-d2eaea457506
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
2 July 2015
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Tenentes, Vasileios
1bff9ebc-9186-438b-850e-6c738994fa39
Khursheed, Saqib
0c4e3d52-0df5-43d9-bafe-d2eaea457506
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Rossi, Daniele, Tenentes, Vasileios, Khursheed, Saqib and Al-Hashimi, Bashir
(2015)
NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating.
In 20th IEEE European Test Symposium: ETS 2015.
IEEE..
(doi:10.1109/ETS.2015.7138752).
Record type:
Conference or Workshop Item
(Paper)
Abstract
In this paper we show that power gating techniques become more effective during their lifetime, since the aging of sleep transistors (STs) due to negative bias temperature instability (NBTI) drastically reduces leakage power. Based on this property, we propose an NBTI and leakage aware ST design method for reliable and energy efficient power gating. Through SPICE simulations, we show lifetime extension up to 19.9x and average leakage power reduction up to 14.4% compared to standard STs design approach without additional area overhead.
Finally, when a maximum 10-year lifetime target is considered, we show that the proposed method allows multiple beneficial options compared to a standard STs design method: either to improve circuit operating frequency up to 9.53% or to reduce ST area overhead up to 18.4%
Text
ets15-84.pdf
- Accepted Manuscript
More information
Accepted/In Press date: 20 February 2015
e-pub ahead of print date: 2 July 2015
Published date: 2 July 2015
Venue - Dates:
IEEE European Test Symposium 2015, Cluj-Napoca, Romania, 2015-05-25 - 2015-05-29
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 374987
URI: http://eprints.soton.ac.uk/id/eprint/374987
ISSN: 1530-1877
PURE UUID: aec98747-b98b-45a6-8260-c2ffb681c5da
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Date deposited: 09 Mar 2015 11:34
Last modified: 16 Mar 2024 03:10
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Contributors
Author:
Daniele Rossi
Author:
Vasileios Tenentes
Author:
Saqib Khursheed
Author:
Bashir Al-Hashimi
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