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Impact of aging phenomena on Latches’ robustness

Impact of aging phenomena on Latches’ robustness
Impact of aging phenomena on Latches’ robustness
In this paper, we analyze the effects of aging mechanisms on the soft error susceptibility of both standard and robust latches. Particularly, we consider Bias Temperature Instability (BTI) affecting both nMOS (positive BTI) and pMOS (negative BTI), which is considered the most critical aging mechanism threatening the reliability of ICs. Our analyses show that, as an IC ages, BTI increases significantly the susceptibility of both standard latches and low-cost robust latches, whose robustness is based on the increase in the critical charge of their most susceptible node(s). Instead, we will show that BTI minimally affects the soft error susceptibility of more costly robust latches that avoid the generation of soft errors by design. Consequently, our analysis highlights the fact that, in applications mandating the use of low-cost robust latches, designers will have to face the problem of their robustness degradation during IC lifetime. Therefore, for these applications, designers will have to develop proper low-cost solutions to guarantee the minimal required level of robustness during the whole IC lifetime.
129-136
Omana, Martin
7c091df8-0526-4d15-aa3f-f25dea90dd18
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Edara, TusharaSandeep
1e31297e-5123-42d3-9713-73f93d39fe37
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Omana, Martin
7c091df8-0526-4d15-aa3f-f25dea90dd18
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Edara, TusharaSandeep
1e31297e-5123-42d3-9713-73f93d39fe37
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae

Omana, Martin, Rossi, Daniele, Edara, TusharaSandeep and Metra, Cecilia (2016) Impact of aging phenomena on Latches’ robustness. IEEE Transactions on Nanotechnology, 15 (2), 129-136. (doi:10.1109/TNANO.2015.2494612).

Record type: Article

Abstract

In this paper, we analyze the effects of aging mechanisms on the soft error susceptibility of both standard and robust latches. Particularly, we consider Bias Temperature Instability (BTI) affecting both nMOS (positive BTI) and pMOS (negative BTI), which is considered the most critical aging mechanism threatening the reliability of ICs. Our analyses show that, as an IC ages, BTI increases significantly the susceptibility of both standard latches and low-cost robust latches, whose robustness is based on the increase in the critical charge of their most susceptible node(s). Instead, we will show that BTI minimally affects the soft error susceptibility of more costly robust latches that avoid the generation of soft errors by design. Consequently, our analysis highlights the fact that, in applications mandating the use of low-cost robust latches, designers will have to face the problem of their robustness degradation during IC lifetime. Therefore, for these applications, designers will have to develop proper low-cost solutions to guarantee the minimal required level of robustness during the whole IC lifetime.

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Accepted/In Press date: 14 October 2015
e-pub ahead of print date: 25 October 2015
Published date: 10 March 2016
Organisations: Electronic & Software Systems

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Local EPrints ID: 393457
URI: http://eprints.soton.ac.uk/id/eprint/393457
PURE UUID: 8468ce37-022c-4f99-a926-f0455cf47e21

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Date deposited: 27 Apr 2016 10:43
Last modified: 15 Mar 2024 00:02

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Contributors

Author: Martin Omana
Author: Daniele Rossi
Author: TusharaSandeep Edara
Author: Cecilia Metra

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