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IP protection of mesh NoCs using square spiral routing

IP protection of mesh NoCs using square spiral routing
IP protection of mesh NoCs using square spiral routing
Intellectual property (IP) core reuse is essential for the design process of system-on-chip (SoC). Network-on-chip (NoC) has been used as an independent IP core during SoC design. However, the NoC has not been protected via IP protection and paid attention on its innovations. This paper proposes the first known approach to protect the authorship and the usage legitimacy of NoCs using specially designed routing, square spiral routing. The special routing algorithm exploits routing redundancy inherent in the mesh NoCs and transports packets along the paths, which have very low probability to be taken under commonly used routing algorithms. These unique and diverse paths are exploited in this paper to embed information of the author and identify the legal buyer of NoCs, showing high robustness and credibility. The hardware implementation of an IP-protected mesh NoC shows that the area overhead is small, which is ~0.74%, and the power overhead is ~0.52%, while the functionality and performance of the network is not affected. In this paper, the approach is presented for the mesh NoC, but the idea is equally applicable to other NoC topologies where the unique and diverse paths also inherently exist.
1063-8210
1560-1573
Liu, Q.
9c3579c5-8fa0-402b-ad8e-83f4542b1b05
Ji, W.
53b72474-e57b-4e45-affb-f1fbf69d3e21
Chen, Q.
dd95839a-6c50-4287-b5d6-1d87c949db2b
Mak, T.
0f90ac88-f035-4f92-a62a-7eb92406ea53
Liu, Q.
9c3579c5-8fa0-402b-ad8e-83f4542b1b05
Ji, W.
53b72474-e57b-4e45-affb-f1fbf69d3e21
Chen, Q.
dd95839a-6c50-4287-b5d6-1d87c949db2b
Mak, T.
0f90ac88-f035-4f92-a62a-7eb92406ea53

Liu, Q., Ji, W., Chen, Q. and Mak, T. (2016) IP protection of mesh NoCs using square spiral routing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24 (4), 1560-1573. (doi:10.1109/TVLSI.2015.2462842).

Record type: Article

Abstract

Intellectual property (IP) core reuse is essential for the design process of system-on-chip (SoC). Network-on-chip (NoC) has been used as an independent IP core during SoC design. However, the NoC has not been protected via IP protection and paid attention on its innovations. This paper proposes the first known approach to protect the authorship and the usage legitimacy of NoCs using specially designed routing, square spiral routing. The special routing algorithm exploits routing redundancy inherent in the mesh NoCs and transports packets along the paths, which have very low probability to be taken under commonly used routing algorithms. These unique and diverse paths are exploited in this paper to embed information of the author and identify the legal buyer of NoCs, showing high robustness and credibility. The hardware implementation of an IP-protected mesh NoC shows that the area overhead is small, which is ~0.74%, and the power overhead is ~0.52%, while the functionality and performance of the network is not affected. In this paper, the approach is presented for the mesh NoC, but the idea is equally applicable to other NoC topologies where the unique and diverse paths also inherently exist.

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More information

Accepted/In Press date: 16 July 2015
e-pub ahead of print date: 15 August 2015
Published date: April 2016
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 401856
URI: http://eprints.soton.ac.uk/id/eprint/401856
ISSN: 1063-8210
PURE UUID: 07570543-7958-4d90-adc6-0346cc7d9cd6

Catalogue record

Date deposited: 24 Oct 2016 13:48
Last modified: 15 Mar 2024 02:56

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Contributors

Author: Q. Liu
Author: W. Ji
Author: Q. Chen
Author: T. Mak

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