Design of a robust digital current controller for a grid connected interleaved inverter

Description/Abstract

This paper is concerned with the design and practical
implementation of a robust digital current controller for a threephase
voltage source grid-connected interleaved inverter. Each
phase consists of 6 half-bridge channels connected in parallel.

Due to the current ripple cancellation of the interleaving
topology, only small output filter capacitors are required which
provide high impedance to grid voltage harmonics and hence
better current quality compared to traditional 2-level LCL
topology.

The current in each inductor is controlled via a single
feedback loop. A feedforward loop of the grid voltage is
incorporated to compensate for the grid disturbance. To control
the high resonance frequency of the filter, high sampling and
switching frequencies are required. Alternatively, resistors in
series with the filter capacitors are used to provide damping.

This method becomes practically possible due to the low
magnitude of the current of the capacitors and consequently low
power dissipation in the damping resistors. The paper also
studies in detail the effects of computational time delay and grid
impedance variation on system stability. A phase lag
compensator incorporated in the inductor current loop is
designed to increase system immunity to grid impedance
variations. Simulation and practical results are presented to
validate the design.