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Path algebras for CMOS circuit testing

Path algebras for CMOS circuit testing
Path algebras for CMOS circuit testing
47-54
Damper, R.I.
6e0e7fdc-57ec-44d4-bc0f-029d17ba441d
Burgess, N.
2e290a85-7733-415b-a97d-2157494ffaf6
Damper, R.I.
6e0e7fdc-57ec-44d4-bc0f-029d17ba441d
Burgess, N.
2e290a85-7733-415b-a97d-2157494ffaf6

Damper, R.I. and Burgess, N. (1990) Path algebras for CMOS circuit testing. Facta Universitatis, Series: Electronics and Energetics, University of Nis, Yugoslavia, 3, 47-54.

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Published date: 1990
Organisations: Southampton Wireless Group

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Local EPrints ID: 250289
URI: http://eprints.soton.ac.uk/id/eprint/250289
PURE UUID: 6f421907-a7eb-444c-a427-d50d0b7eb1f0

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Date deposited: 28 May 1999
Last modified: 10 Dec 2021 20:07

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Contributors

Author: R.I. Damper
Author: N. Burgess

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