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Current control of utility-connected two-level and three-level PWM inverters

Current control of utility-connected two-level and three-level PWM inverters
Current control of utility-connected two-level and three-level PWM inverters
This paper discusses the design of a digital current controller for three-phase utility-connected 2-level and 3-level PWM inverters with output LCL filters in which the filter capacitors are connected to the dc link rails. The controller has a two-loop feedback structure, with an additional feedforward loop to compensate for utility voltage harmonic disturbance. A detailed analysis of the effect of the controller microprocessor time delay on the stability and transient response of the controller is presented.
Analytical and simulation results are presented for both the 2-level and the 3-level inverter systems, demonstrating the effectiveness of the proposed controller in producing good quality current with low THD. The results confirm that using a 3-level inverter has the advantage of halving the current ripple in the filter’s main inductors, at the expense of extra inverter power devices and electronic hardware and software complexity. Experimental results for a 2-level inverter system are also presented.
0939-8368
13-18
Abu Sharkh, S.M.
c8445516-dafe-41c2-b7e8-c21e295e56b9
Abu-Sara, M.A.
cde8e173-f938-4210-8b9d-d1bf3a9a429a
Abu Sharkh, S.M.
c8445516-dafe-41c2-b7e8-c21e295e56b9
Abu-Sara, M.A.
cde8e173-f938-4210-8b9d-d1bf3a9a429a

Abu Sharkh, S.M. and Abu-Sara, M.A. (2004) Current control of utility-connected two-level and three-level PWM inverters. European Power Electronics and Drives Journal, 14-4 (3), 13-18.

Record type: Article

Abstract

This paper discusses the design of a digital current controller for three-phase utility-connected 2-level and 3-level PWM inverters with output LCL filters in which the filter capacitors are connected to the dc link rails. The controller has a two-loop feedback structure, with an additional feedforward loop to compensate for utility voltage harmonic disturbance. A detailed analysis of the effect of the controller microprocessor time delay on the stability and transient response of the controller is presented.
Analytical and simulation results are presented for both the 2-level and the 3-level inverter systems, demonstrating the effectiveness of the proposed controller in producing good quality current with low THD. The results confirm that using a 3-level inverter has the advantage of halving the current ripple in the filter’s main inductors, at the expense of extra inverter power devices and electronic hardware and software complexity. Experimental results for a 2-level inverter system are also presented.

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Published date: 2004

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Local EPrints ID: 22935
URI: http://eprints.soton.ac.uk/id/eprint/22935
ISSN: 0939-8368
PURE UUID: 58f34824-d29c-4905-b822-38ccf4a761c5

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Date deposited: 23 Mar 2006
Last modified: 09 Sep 2019 17:55

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