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Optimisation of BiCMOS buffers for low voltage applications

Optimisation of BiCMOS buffers for low voltage applications
Optimisation of BiCMOS buffers for low voltage applications
Routley, P
db1def0e-717c-4d10-a69a-925d9cca4e70
Brunnschweiler, A
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Ashburn, P
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Routley, P
db1def0e-717c-4d10-a69a-925d9cca4e70
Brunnschweiler, A
2d39ef7c-b95e-476c-b435-316b6618a565
Ashburn, P
68cef6b7-205b-47aa-9efb-f1f09f5c1038

Routley, P, Brunnschweiler, A and Ashburn, P (1994) Optimisation of BiCMOS buffers for low voltage applications.

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More information

Published date: 1994
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 250950
URI: http://eprints.soton.ac.uk/id/eprint/250950
PURE UUID: de61a5ad-b6ae-4e28-a75e-6b65b3bdd2ff

Catalogue record

Date deposited: 04 Oct 1999
Last modified: 10 Dec 2021 20:19

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Contributors

Author: P Routley
Author: A Brunnschweiler
Author: P Ashburn

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