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Low temperature performance of self-aligned, etched polysilicon emitter pseudo-heterojunction bipolar transistors

Low temperature performance of self-aligned, etched polysilicon emitter pseudo-heterojunction bipolar transistors
Low temperature performance of self-aligned, etched polysilicon emitter pseudo-heterojunction bipolar transistors
In this paper we present an investigation of the static performance over the 300K-80K temperature range of pseudo-heterojunction bipolar transistors using an advanced single-polysilicon CMOS compatible self-aligned structure and epitaxial growth for the base and the low doped emitter spacer. These devices exhibit ideal collector currents and non-ideal base currents. By analysing the base leakage current, we have been able to identify the main critical fabrication steps. The bandgap narrowing in the base has been deduced from the temperature dependence of the collector current and the effect of a parasitic boron spike in the base doping profile on the low temperature performance of the transistor has been studied.
Giroult-Matlakowski, G
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Bousetta, H
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LeTron, B
007139fc-4300-4581-99b2-7697d5bcda1e
Dutartre, D
e5265f68-0ba3-47b4-8950-6618494ea8ae
Warren, P
a42a8ffc-ad93-452e-ba8b-5d92101cda20
Bouzid, M J
cd0df0a9-a8eb-460a-927b-4518bba4b6ab
Nouailhat, A
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Ashburn, P
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Chantre, A
0535d54c-1aa6-484f-af55-4f412aab911b
Giroult-Matlakowski, G
ea4162db-06a6-408e-a9c5-164adbb979cb
Bousetta, H
fff7a8c7-f5ab-42c3-8de7-fbaff6719734
LeTron, B
007139fc-4300-4581-99b2-7697d5bcda1e
Dutartre, D
e5265f68-0ba3-47b4-8950-6618494ea8ae
Warren, P
a42a8ffc-ad93-452e-ba8b-5d92101cda20
Bouzid, M J
cd0df0a9-a8eb-460a-927b-4518bba4b6ab
Nouailhat, A
1f1cd513-03d7-477c-9a01-048153cb5209
Ashburn, P
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Chantre, A
0535d54c-1aa6-484f-af55-4f412aab911b

Giroult-Matlakowski, G, Bousetta, H, LeTron, B, Dutartre, D, Warren, P, Bouzid, M J, Nouailhat, A, Ashburn, P and Chantre, A (1994) Low temperature performance of self-aligned, etched polysilicon emitter pseudo-heterojunction bipolar transistors. (doi:10.1051/jp4:1994617).

Record type: Other

Abstract

In this paper we present an investigation of the static performance over the 300K-80K temperature range of pseudo-heterojunction bipolar transistors using an advanced single-polysilicon CMOS compatible self-aligned structure and epitaxial growth for the base and the low doped emitter spacer. These devices exhibit ideal collector currents and non-ideal base currents. By analysing the base leakage current, we have been able to identify the main critical fabrication steps. The bandgap narrowing in the base has been deduced from the temperature dependence of the collector current and the effect of a parasitic boron spike in the base doping profile on the low temperature performance of the transistor has been studied.

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More information

Published date: 1994
Additional Information: in Journal de Physique IV (Proceedings) 04 (C6-111) Colloque C6 Supplement au Journal de Physique III, Volume 4, juin 1994
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 250953
URI: http://eprints.soton.ac.uk/id/eprint/250953
PURE UUID: 22377103-b157-4f15-b509-7864ba2fce71

Catalogue record

Date deposited: 04 Oct 1999
Last modified: 14 Mar 2024 05:06

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Contributors

Author: G Giroult-Matlakowski
Author: H Bousetta
Author: B LeTron
Author: D Dutartre
Author: P Warren
Author: M J Bouzid
Author: A Nouailhat
Author: P Ashburn
Author: A Chantre

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