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Hierarchical Module Expansion in a VHDL Behavioural Synthesis System

Williams, A.C., Brown, A.D. and Baidas, Z.A. (1998) Hierarchical Module Expansion in a VHDL Behavioural Synthesis System

Record type: Conference or Workshop Item (Other)


This paper describes a technique developed in the MOODS (Multiple Objective Optimisation in Data and control path Synthesis) behavioural VHDL synthesis system whereby functional data-path modules may be dynamically expanded in-situ during the optimisation process, replacing the original ?black box? implementation by its constituent sub-components within the top-level control and data path structure. This enables inter-module optimisation to occur at the sub-module level resulting in substantial area reductions, particularly when targeting restricted device architectures with a limited range of primitive cells, such as FPGAs.

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Published date: September 1998
Organisations: EEE


Local EPrints ID: 251235
PURE UUID: d763df7b-f558-44b1-a0ca-7e194a6de3f5

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Date deposited: 22 Oct 1999
Last modified: 18 Jul 2017 10:11

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Author: A.C. Williams
Author: A.D. Brown
Author: Z.A. Baidas

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