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Multi-Level Fault Modeling Of Analog Circuits

Multi-Level Fault Modeling Of Analog Circuits
Multi-Level Fault Modeling Of Analog Circuits
Zwolinski, M.
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Chalk, C.D.
896adf6a-641e-406d-9777-9a12ea51e4aa
Perkins, A.J.
0379d182-b7ad-484e-b305-d87fa546a9db
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Chalk, C.D.
896adf6a-641e-406d-9777-9a12ea51e4aa
Perkins, A.J.
0379d182-b7ad-484e-b305-d87fa546a9db

Zwolinski, M., Chalk, C.D. and Perkins, A.J. (1997) Multi-Level Fault Modeling Of Analog Circuits

Record type: Other

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More information

Published date: 1997
Additional Information: IEEE/VIUF International Workshop on Behavioral Modeling and Simulatio Organisation: IEEE/VIUF
Organisations: EEE

Identifiers

Local EPrints ID: 251847
URI: http://eprints.soton.ac.uk/id/eprint/251847
PURE UUID: 9d0fe79f-88cc-4686-b398-0b2dc4d6546e
ORCID for M. Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 12 Nov 1999
Last modified: 18 Jul 2017 10:08

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Contributors

Author: M. Zwolinski ORCID iD
Author: C.D. Chalk
Author: A.J. Perkins

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