An 12L clocked gate array for undergraduate design exercises


Jesshope, C R and Ashburn, P (1985) An 12L clocked gate array for undergraduate design exercises

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Item Type: Other
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 251869
Date :
Date Event
1985Published
Date Deposited: 15 Nov 1999
Last Modified: 17 Apr 2017 23:40
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/251869

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