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System Design Validation Using Formal Models

System Design Validation Using Formal Models
System Design Validation Using Formal Models
ISBN 0-7695-0246-6
10-14
Henderson, P.
bf0a7293-7277-459d-9c3c-67b0a6eabd54
Walters, R. J.
7b8732fb-3083-4f4d-844e-85a29daaa2c1
Henderson, P.
bf0a7293-7277-459d-9c3c-67b0a6eabd54
Walters, R. J.
7b8732fb-3083-4f4d-844e-85a29daaa2c1

Henderson, P. and Walters, R. J. (1999) System Design Validation Using Formal Models. At Proc. 10th Int. Workshop on Rapid System Prototyping (RSP) Proc. 10th Int. Workshop on Rapid System Prototyping (RSP). pp. 10-14.

Record type: Conference or Workshop Item (Other)

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More information

Published date: 1999
Additional Information: Address: Clearwater, Florida
Venue - Dates: Proc. 10th Int. Workshop on Rapid System Prototyping (RSP), 1999-01-01
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 252662
URI: https://eprints.soton.ac.uk/id/eprint/252662
ISBN: ISBN 0-7695-0246-6
PURE UUID: afb57c63-fee9-4de4-b355-49bc80149ecf

Catalogue record

Date deposited: 10 Mar 2000
Last modified: 18 Jul 2017 10:03

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