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An 8-bit 3MS/s CMOS two-step flash converter for low voltage mixed signal CMOS integration

An 8-bit 3MS/s CMOS two-step flash converter for low voltage mixed signal CMOS integration
An 8-bit 3MS/s CMOS two-step flash converter for low voltage mixed signal CMOS integration
Many large, mainly digital system ICs require on-chip A/D conversion for their input interface, and the task of incorporating this function into a hostile environment is not trivial. As power supplies for these digital systems are reduced, the analogue functions must follow suit. In this paper we describe a two-step flash converter capable of operating at 3MS/s with a supply voltage of just 3V. The circuit uses a novel offset cancelling comparator particularly suited to these applications. The circuit has been fabricated in 0.8 mu CMOS, and has been incorporated into large system ICs.
IEEE
Tryzna, M.
dc10db75-9bae-41fa-82fc-a88c912fb69a
Neuteboom, H.
fb0147c0-6149-438e-bdce-ac610d3732ce
Nandra, N.
44405487-d06c-490f-8a39-67748a11eb68
Redman-White, W.
d5376167-c925-460f-8e9c-13bffda8e0bf
Tryzna, M.
dc10db75-9bae-41fa-82fc-a88c912fb69a
Neuteboom, H.
fb0147c0-6149-438e-bdce-ac610d3732ce
Nandra, N.
44405487-d06c-490f-8a39-67748a11eb68
Redman-White, W.
d5376167-c925-460f-8e9c-13bffda8e0bf

Tryzna, M., Neuteboom, H., Nandra, N. and Redman-White, W. (1994) An 8-bit 3MS/s CMOS two-step flash converter for low voltage mixed signal CMOS integration. In 1994 Second International Conference on Advanced A-D and D-A Conversion Techniques and their Applications. IEEE.. (doi:10.1049/cp:19940546).

Record type: Conference or Workshop Item (Paper)

Abstract

Many large, mainly digital system ICs require on-chip A/D conversion for their input interface, and the task of incorporating this function into a hostile environment is not trivial. As power supplies for these digital systems are reduced, the analogue functions must follow suit. In this paper we describe a two-step flash converter capable of operating at 3MS/s with a supply voltage of just 3V. The circuit uses a novel offset cancelling comparator particularly suited to these applications. The circuit has been fabricated in 0.8 mu CMOS, and has been incorporated into large system ICs.

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More information

Published date: July 1994
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 253009
URI: https://eprints.soton.ac.uk/id/eprint/253009
PURE UUID: 8dd8e750-9663-43c4-9270-a970b6c37f19

Catalogue record

Date deposited: 19 Apr 2000
Last modified: 18 Dec 2018 17:30

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